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 CYV270M0101EQ
Adaptive Video Cable Equalizer (SOIC)
Features
* Adaptive Cable Equalization * SMPTE 259M Compliant * Supports DVB-ASI at 270 Mbps * Multi-standard operation from 143 Mbps to 360 Mbps * Cable Length Indicator for SD-SDI data rates * Maximum Cable Length Adjustment for SD-SDI data rates * Carrier detect and Mute functionality for SD-SDI data rates * Equalizer Bypass Mode * Seamless connection with HOTLink IITM Family, HOTLink (R)TM Receiver * Equalizes up to 350m of Belden 1694A coaxial cable at 270 Mbps * Low Power 160 mW @ 3.3V * Single 3.3V supply * 16-pin SOIC * 0.18-m CMOS technology * Pb-free and RoHS compliant * Pin-compatible to existing equalizer devices
Functional Description
The CYV270M0101EQ is an adaptive video cable equalizer designed to equalize and restore signals received over 75 coaxial cable. The equalizer is designed to meet SMPTE 259M data rates and is optimized for performance at 270 Mbps. The CYV270M0101EQ is optimized to equalize up to 350m of Belden 1694A coaxial cable at 270 Mbps. The CYV270M0101EQ connects seamlessly to the HOTLink II family of transceiver devices and HOTLink(R) receiver devices. The CYV270M0101EQ has DC restoration for compensation of the DC content of the SMPTE pathological patterns. A cable length indicator (CLI) provides an indication of the cable length being equalized at SD-SDI data rates. The Maximum cable length adjust (MCLADJ) sets the approximate maximum cable length to be equalized. The CYV270M0101EQ's differential serial outputs (SDO, SDO) mute, when the approximate cable length set by MCLADJ is reached. CD/MUTE is a bidirectional pin that provides an indication of the signal being present at the equalizer inputs. It also controls muting the outputs of the equalizer. Power consumption is typically 160 mW at 3.3V.
Equalizer System Connection Diagram
HOTLink IITM Serializer
Cable Driver
Serial Links Copper Cable Connections
CYV270M0101EQ Multi-Rate Cable Equalizer
HOTLink IITM Deserializer
Cypress Semiconductor Corporation Document #: 001-06830 Rev. *A
*
198 Champion Court
*
San Jose, CA 95134-1709 * 408-943-2600 Revised January 8, 2007
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CYV270M0101EQ
Equalizer Block Diagram
CYV270M0101EQ Adaptive Video Cable Equalizer Block Diagram CYV270M0101EQ Adaptive Video Cable Equalizer Block Diagram
CLI MCLADJ Cable Length Analog Indicator and Mute Threshold Block Carrier Detect and Mute Control Block
CD / MUTE
DC Restore
BYPASS
SDI, SDI
Equalizer
Differential Output
SDO, SDO
Pin Configuration (Top View)
16-PIN SOIC Top View
CLI VCC GND SDI SDI GND AGC+ AGC2 3 4 CYV270M0101EQ 5 6 7 8 12 11 10 9 SDO GND MCLADJ BYPASS 16 15 14 13 CD/MUTE VCC GND SDO
Document #: 001-06830 Rev. *A
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CYV270M0101EQ
Pin Descriptions
CYV270M0101EQ Single Channel Cable Equalizer Name Control Signals CLI CD/MUTE Analog Output LVTTL I/O Cable Length Indicator: CLI provides an analog voltage proportional to the cable length being equalized. Carrier Detect/Mute Indicator: Output: When the incoming data stream is present, the CD/MUTE outputs a voltage less than 0.8V. When the incoming data stream is not present, the CD/MUTE outputs a voltage greater than 2.9V. Input: When the CD/MUTE pin is tied to ground, the equalizer's differential serial outputs are not muted and the MCLADJ setting is overwritten. When the CD/MUTE pin is tied to VCC, the equalizer's differential serial outputs are muted and the MCLADJ setting is overwritten. MCLADJ Analog Input Maximum Cable Length Adjust: The maximum cable length to be equalized is set by the voltage applied to the MCLADJ input. When the maximum cable length set by MCLADJ is reached, the differential output is muted. Equalizer Bypass: When BYPASS is tied to VCC, the signal presented at the equalizer's differential serial inputs (SDI, SDI) is routed to the equalizer's differential serial outputs (SDO, SDO) without performing equalization. When BYPASS is tied to GND, the incoming video data stream is equalized and presented at the equalizer`s serial differential outputs (SDO, SDO). In equalizer bypass mode, CD/MUTE is not functional. AGC SDO, SDO SDI, SDI Power VCC GND Power Gnd +3.3V Power. Connect to Ground. The CYV270M0101EQ equalizer has variable gain and multiple equalization stages that reverse the effects of the cable. This equalization is achieved by separate regulation of the lower and higher frequency components in the signal to give a clean eye. The CYV270M0101EQ has DC restoration for compensating the DC content of the SMPTE pathological patterns. Analog Differential Output Differential Input Automatic Gain Control: A capacitor of 1 F should be placed between the AGC pins. Differential Serial Outputs: The equalized serial video data stream is presented at the SDO/SDO differential serial CML output. Differential Serial Inputs: SDI/SDI can accept either a single ended or differential serial video data stream over 75 coaxial cable. I/O Characteristics Signal Description
BYPASS
LVTTL Input
Equalizer Operation
The CYV270M0101EQ is an adaptive video cable equalizer designed to equalize standard definition (SD) serial digital interface (SDI) video data streams. The CYV270M0101EQ equalizer is optimized to equalize up to 350m of Belden 1694A cable at 270 Mbps. The CYV270M0101EQ equalizer contains one power supply and typically consumes 160 mW power at 3.3V. The adaptive equalizer is designed to meet the SMPTE 259M and DVB-ASI video standards. The equalizer meets all pathological requirements for SMPTE 259M as defined by RP178. The CYV270M0101EQ Video Cable Equalizer is auto-adaptive from 143 Mbps to 360 Mbps.
SDI, SDI
The CYV270M0101EQ accepts single-ended or differential serial video data streams over 75 coaxial cable. It is recommended to AC-couple the SDI, SDI inputs as they are internally biased to 1.2V.
Document #: 001-06830 Rev. *A
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CYV270M0101EQ
SDO, SDO
The CYV270M0101EQ has differential serial output interface drivers that use current mode logic [CML] drivers to provide source matching for the transmission line. These outputs can be either AC coupled or DC coupled to the HOTLink II SerDes device. equalizer's input, or it controls the muting of the equalizer's output. If CD/MUTE is used as an output, and the incoming data stream is not present, the voltage at the CD/MUTE output will be greater than 2.9V. If CD/MUTE is used as an output, and the incoming data stream is present, then the voltage at the CD/MUTE output will be less than 0.8V. If CD/MUTE is used as an input, and tied to ground, the equalizer serial outputs are not muted and the MCLADJ setting is overwritten. If the CD/MUTE is used as an input and is tied to VCC, then the equalizer serial outputs are muted and the MCLADJ setting is overwritten. When an invalid signal or a signal transmitted with a launch amplitude of less than 500mV at SD data-rates is received, the equalizer's serial outputs are muted and the MCLADJ setting is overwritten.
CLI
Cable Length Indicator (CLI) is an analog output that gives an output voltage proportional to the cable length being equalized. CLI gives an approximation of the length of cable at the differential serial inputs (SDI, SDI). CLI works at standard definition (SD) data rates. The graph in Figure 2 illustrates the CLI output voltage at various Belden 1694A cable lengths. With an increase in cable length, CLI output voltage decreases.
MCLADJ
Maximum Cable Length Adjust (MCLADJ) sets the approximate maximum amount of cable to be equalized. When the maximum cable length set by MCLADJ is reached, the outputs are muted. If the MCLADJ voltage is greater than the CLI output voltage, the equalizer serial differential outputs (SDO, SDO) are muted. If the MCLADJ voltage is less than CLI voltage, then the equalizer's differential serial outputs (SDO, SDO) are not muted and the incoming data stream is equalized. The graph in Figure 1 illustrates the voltage needed at MCLADJ input, to equalize various Belden 1694A cable lengths for SD data rates. The MCLADJ pin can be left unconnected in applications that do not require muting of the outputs.
BYPASS
The CYV270M0101EQ has a bypass mode that allows the user to bypass the equalizer's equalization and DC restoration functions. When the Bypass mode is tied to VCC, the signal presented at the equalizer's differential serial inputs (SDI, SDI) is routed to the equalizer's differential serial outputs (SDO, SDO) without performing equalization. When BYPASS is tied to GND, the incoming video data stream is equalized and presented at the equalizer`s differential serial outputs (SDO, SDO). In equalizer bypass mode, CD/MUTE is not functional.
AGC
A capacitor of 1 F should be placed between the AGC pins of the CYV270M0101EQ equalizer.
CD/MUTE
Carrier Detect/MUTE (CD/MUTE) is a bidirectional pin that provides an indication of the signal being present at the
Document #: 001-06830 Rev. *A
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CYV270M0101EQ
Maximum Ratings
Above which the useful life may be impaired. User guidelines only, not tested Storage Temperature .................................. -65C to +150C Ambient Temperature with Power Applied............................................. -55C to +125C Supply Voltage to Ground Potential ............... -0.5V to +3.8V DC Voltage Applied to Outputs in High-Z State .......................................-0.5V to VCC + 0.5V DC Input Voltage......................................-0.5V to VCC+0.5V Electro Static Discharge (ESD) HBM .......................> 2000 V (per JEDEC EIA/JESD-A114A) Latch-Up Current ....................................................> 200 mA Power-up Requirements The CYV270M0101EQ contains one power supply. The voltage on any input or I/O pin cannot exceed the power pin during power-up.
Operating Range
Range Commercial Ambient Temperature 0C to +70C VCC +3.3V 5%
DC Electrical Characteristics
Parameter VCC PD IS VCMOUT VCMIN Supply Description Voltage[1] Power Consumption[2] Supply Current[1] Output Common Mode Input Common Mode [Bypass = High] Voltage[1] Voltage[1] Test Conditions - - - Load = 50 - - - - - - Carrier Not Present Carrier Present CD/MUTE Input Voltage Required to Force Outputs to Mute[1] CD/MUTE Input Voltage Required to Force Active[1] Min. to Mute Max. to Activate Min. 3.135 125 38 - 1 0 2.3 1.5 1.1 0.4 2.9 - 2.5 - Typ. 3.3 160 48 VCC - VSDO/2 1.24 1.24 2.65 1.9 1.3 0.72 - - - - Max. 3.465 190 58 - 1.4 2.9 2.95 2.3 1.6 1.02 - 0.8 - 1 Unit V mW mA V V V V V V V V V V V
Input Common Mode Voltage[1] [Bypass = Low] - - - - VCD/MUTE(OL) VCD/MUTE VCD/MUTE CLI DC Voltage (0m)[1] CLI DC Voltage (no MCLADJ Range[3] Voltage[1] signal)[1] Voltage[1] Floating MCLADJ DC
VCD/MUTE(OH) CD/MUTE Output
Notes 1. Production test. 2. Calculated results from production test. 3. Not tested. Based on characterization.
Document #: 001-06830 Rev. *A
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CYV270M0101EQ
AC Electrical Characteristics
Parameter - VSDI VSDO - Description Serial Input Data Rate Input Voltage Swing Output Voltage Swing[1] Maximum Equalized Cable Length[1] Output Rise/Fall Time[3, 4] Mismatch in Rise/Fall time[3, 4] Duty cycle distortion[3, 4] Loss[3, 4] Single ended Single ended Single ended Overshoot[3, 4] Input Return Input Resistance[3] Input Capacitance[3] Output Resistance[3]
[1]
Test Conditions - Single ended, at the transmitter, SD data rate Differentialp-p, 50 load 270 Mbps, Belden 1694A, 800 mV transmit amplitude, equalizer pathological pattern, 0.2 UI equalizer output jitter 20% - 80% - SD Color Bar Pattern - -
Min. 143 500[5] 500 -
Typ. - 800[1] 700 350
Max. 360 1200 950 -
Unit Mbps mV mV m
- - - - - - - -
80 - - - 15 - - -
120 - 0.03 - - 2.5 1 50
270 30 - 10 - - - -
ps ps UI % dB k pF
Notes 4. Not tested. Guaranteed by design simulations. 5. Based on characterization across temperature and voltage with 350m of Belden 1694A cable, transmitting SMPTE Equalizer Pathological Test Pattern.
Document #: 001-06830 Rev. *A
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CYV270M0101EQ
Typical Performance Graphs
(Unless Otherwise mentioned, VCC = 3.3V, TA = 25C) Figure 1. MCLADJ Input Voltage vs. Belden 1694A Cable Length at SD-SDI Data Rate
2.7 2.6 2.5 2.4
VOLTAGE (V)
2.3 2.2 2.1 2 1.9 1.8 1.7 0 50 100 150 200 250 300 350
CABLE LENGTH (m )
Figure 2. CLI Output Voltage vs. Belden 1694A Cable Length at SD-SDI Data Rate
2.7 2.6 2.5 2.4
VOLTAGE (V)
2.3 2.2 2.1 2 1.9 1.8 1.7 0 50 100 150 200 250 300 350
CABLE LENGTH (m )
Document #: 001-06830 Rev. *A
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CYV270M0101EQ
Typical Application Circuit
Figure 3. Interfacing CYV270M0101EQ to the HOTLink II SerDes
CD/ MUTE
CL I
+3.3V
LFI RXD7 RXD6 RXD5 RXD4 RXD3 RXD2 RXD1 RXD0 RXOP RXST2 RXST1 RXST0 RXCLK+ RXCLK- RXCLKC+ RXLE SDASEL LPEN INSEL IN1+ IN1- FRAMCHAR RFEN RFMODE DECMODE RXCKSEL RXMODE RXRATE
+3.3V
C12
0.01 F Z0 2 Z0
R18
C10 16 15 14 13 12 11 10 9
0. 01 F
CD/MUTE CLI VCC VCC VEE VEE SDO SDI SDO SDI VEE VEE MCLADJ AGC+ BYPASS AGC-
1 2 3 4 5 6 7 8 C15
1 F 1 F
R16
BN JAC C K
75
C16 L2
75
Z0
6.4 n H
+
1 F
37.4
R15
75
R14
CYV270M0101EQ
MCL ADJ
C11
CYV15G0101DXB
Ordering Information
Ordering Code CYV270M0101EQ-SXC Package Name SZ16.15 Package Type Pb-Free16-lead 150-mil SOIC Operating Range 0 to 70C
Document #: 001-06830 Rev. *A
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CYV270M0101EQ
Package Dimensions
Figure 4. 16-Lead (150-Mil) SOIC S16.15
51-85068-*B
HOTLink II is a trademark of Cypress Semiconductor. All product and company names mentioned in this document may be the trademarks of their respective holders.
Document #: 001-06830 Rev. *A
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(c) Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress. Furthermore, Cypress does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user. The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges.
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CYV270M0101EQ
Document History Page
Document Title: CYV270M0101EQ Adaptive Video Cable Equalizer (SOIC) Document Number: 001-06830 REV. ** *A ECN NO. 427547 663916 ISSUE DATE SEE ECN SEE ECN ORIG. OF CHANGE BCD FRE DESCRIPTION OF CHANGE New Preliminary Data Sheet Updated AC and DC Parameters. Changed Data Sheet status from preliminary to final
Document #: 001-06830 Rev. *A
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